Optimize CPU detection code
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@ -49,19 +49,7 @@
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// ------------------------------------------------------------------
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struct gcpu_info
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{
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char v_name[_MAX_VNAME_LEN+1]; // vendor name
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char m_name[_MAX_MNAME_LEN+1]; // model name
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unsigned family;
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unsigned model;
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unsigned stepping;
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};
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// ------------------------------------------------------------------
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static bool HaveCPUID()
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inline static bool HaveCPUID()
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{
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// TO_PORT_TAG: CPUID
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#if defined(_MSC_VER)
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@ -240,59 +228,67 @@ static void cpuname(int family, int model, const char *v_name, char *m_name)
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// ------------------------------------------------------------------
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void gcpuid(gcpu_info *pinfo)
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char *gcpuid(char *_cpuname)
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{
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static struct { /* used in asm code in gcpuid() */
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unsigned cpu; /* x86, where x=cpu */
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unsigned cpu_high; /* highest CPUID capability */
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char vendor[3*sizeof(dword)+1]; /* CPU vendor string 12 bytes, 13th byte is zero */
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char family; /* CPU stepping number, 4 bits */
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char model; /* CPU model number, 4 bits */
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char stepping; /* CPU stepping value, 4 bits */
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static struct scpuid_t{
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dword cpu; /* x86, where x=cpu */
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dword cpu_high; /* highest CPUID capability */
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#if defined(_MSC_VER)
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union
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{
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char vendor[_MAX_VNAME_LEN+1];
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struct
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{
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dword dw0;
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dword dw1;
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dword dw2;
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} dw;
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};
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#else
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char vendor[3*sizeof(dword)+1]; /* CPU vendor string 12 bytes, 13th byte is zero */
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#endif
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unsigned char family; /* CPU stepping number, 4 bits */
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unsigned char model; /* CPU model number, 4 bits */
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unsigned char stepping; /* CPU stepping value, 4 bits */
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// unsigned cpu_id; /* stepping ID, 12 bits: 0x0FMS */
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// unsigned features; /* CPU features info */
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}scpuid; /* ISO C: static variabled is initialised with 0 */
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}scpuid;
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// memset( &scpuid, 0, sizeof(scpuid) );
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// TO_PORT_TAG: CPUID
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#if defined(_MSC_VER)
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union
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{
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char buff[_MAX_VNAME_LEN];
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struct
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{
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dword dw0;
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dword dw1;
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dword dw2;
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} dw;
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} vendor;
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scpuid.vendor[_MAX_VNAME_LEN] = 0;
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dword standard = 0;
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vendor.buff[_MAX_VNAME_LEN-1] = 0;
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#undef and
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__asm
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{
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// get the vendor string
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xor eax, eax
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cpuid
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mov vendor.dw.dw0, ebx
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mov vendor.dw.dw1, edx
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mov vendor.dw.dw2, ecx
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// mov scpuid.cpu_high, eax
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mov scpuid.dw.dw0, ebx
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mov scpuid.dw.dw1, edx
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mov scpuid.dw.dw2, ecx
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// get the standard bits
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// get the CPU family, model, stepping, features bits
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mov eax, 1
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cpuid
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mov standard, eax
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// mov scpuid.features, edx
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mov bx, ax
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and ax, 0x0F0F // 3855 // 0x0F0F
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mov scpuid.stepping, al
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mov scpuid.family, ah
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shr bl, 4
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mov scpuid.model,bl
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}
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pinfo->family = (standard >> 8) & 0xF; // extracts family
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pinfo->model = (standard >> 4) & 0xF; // extracts model
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pinfo->stepping = standard & 0xF; // extracts stepping
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#define and &&
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strncpy(pinfo->v_name, vendor.buff, _MAX_VNAME_LEN);
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cpuname(pinfo->family, pinfo->model, pinfo->v_name, pinfo->m_name);
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cpuname( scpuid.family, scpuid.model, scpuid.vendor, _cpuname);
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#elif defined(__GNUC__)
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@ -330,7 +326,7 @@ void gcpuid(gcpu_info *pinfo)
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"nexgen:"
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"popfl\n\t"
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"movl $12,%0\n\t" /* CPU NX586 */
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"movl $5,%0\n\t" /* CPU NX586 */
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"movl $0x4778654e,%1\n\t" /* store vendor string */
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"movl $0x72446e65,%1+4\n\t" /* "NexGenDriven" */
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"movl $0x6e657669,%1+8\n\t"
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@ -436,13 +432,13 @@ void gcpuid(gcpu_info *pinfo)
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"eax", "ebx", "ecx", "edx", "esp"
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);
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cpuname(scpuid.family, scpuid.model, scpuid.vendor, pinfo->m_name);
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cpuname(scpuid.family, scpuid.model, scpuid.vendor, _cpuname);
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#else
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strcpy(vendor.buff, "UNKNOUN_CPU!");
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cpuname(0, 0, "UNKNOUN_CPU!", pinfo->m_name);
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cpuname(0, 0, "UNKNOWN ", _cpuname);
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#endif
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return _cpuname;
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}
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@ -503,9 +499,7 @@ char* ggetosstring(void) {
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{
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if (HaveCPUID())
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{
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gcpu_info pinfo;
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gcpuid(&pinfo);
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strcpy(processor, pinfo.m_name);
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gcpuid(processor);
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}
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else
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{
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